!pr2
!rm77
More Detail on Using 65C02's in old Apples......Andrew Jackson

In recent issues of AAL there have been several articles on the 65C02 and how to get it running in the Apple II+.  I too was keen to get a 65C02 working in my machine, and had spent some time trying to get first a 1MHz part and then a 2MHz part to work.

William D. O'Ryan's letter in the June 84 AAL prompted me to try again and I am happy to report that the modification he described does work (replacing the LS257's at B6 and B7 with F257's).  I wanted to find exactly why I could not simply substitute a 65C02 for a 6502, and so I spent some time looking at the circuit and specifications, using an oscilloscope to check my results.

The reasons that I eventually came up with are as follows.  The Apple II circuit relies on various 'features' of the 6502 so that all the various parts of the Apple will work.  The circuit diagram shows that the system timing is derived from o/0; the 6502 actually expects system timing to be derived from o/2.  There is a slight delay between these two signals:  on a 6502 it is about 50ns and on a 65C02 it is about 30ns.  This difference in delays is what causes the problems when fitting a 65C02.

To simplify its circuit design the Apple uses a rather dirty trick when reading data from RAM memory.  Normally when the 6502 reads data it expects the data on the bus to be valid 100ns before the end of o/2, and it latches the data into its internal registers when o/2 changes.  The setup time allows the data bus to settle into a consistent state before being read.  The Apple reduces the setup time to about 45 ns (worst case).  This setup time would be ample for the 65C02 were it not for the shift between o/0 and o/2; this shift reduces the setup time to 25ns.  A 2MHz 65C02 specifies a MINIMUM 40ns setup time; obviously there is a -15ns tolerance on the setup time, and hence the processor works erratically when timings fall into worst case conditions.

The tolerance is regained by substituting 74F257's for the two 74LS257's at board locations B6 and B7.  These two chips multiplex the RAM data and the keyboard data; in doing so they add a delay of 30ns worst case to the data.  By substituting F257's, the added delay is reduced to 5 ns; this changes the tolerance on the data setup time from -15ns to +10ns.

The Apple //e must use a slightly modified technique when reading data from RAM which explains why a 65C02 works in it without any modifications.  I cannot check this as I do not have a //e circuit description.  Anyway, it is probably all inside the MMU chip.

[ The 65816 specifications state a minimum read data setup time of 50ns, 10ns longer than the 65C02.  One AAL reader has called us to report that the 65802 works wonderfully well in his old II+, even better than the original 6502. Some of you have wondered where to get the F257's:  try Jameco Electronics, 1355 Shoreway Road, Belmont, CA 94002, phone (415) 592-8097.  Their ad in Byte, Dec '84, page 349, says they have 74F257's at $1.79 each.  (editor) ]
