!pr1
Mitsubishi 50740 Series

I received information from several sources this week about an interesting new branch of the 6502 tree.  Mitsubishi has pub- lished specs for eight varieties, all part of the "740 series".  The chip is based on the 6502, adds some new addressing modes for some of the standard 6502 opcodes, and adds 13 new opcodes.  (Unfortunately, the opcode enhancements are not compatible with any of the other enhanced 6502s.)

The chips in the 740 series are intended for use as microcon- trollers.  As such, most of them have on-chip RAM and ROM.  They all have built-in I/O ports, timers, and other goodies.  The most interesting (to Don Lancaster, Nigel Nathan, and me) is the M50734.  This chip, said to cost only $12, has four A/D converters, UART, six timers, a serial I/O port, four 8-bit I/O ports, a pair of stepper-motor drivers, and more.  It all lives in a 64-pin shrink-DIP package.  The M50734 is the only one in the 740 series which has no internal ROM and RAM.  It is CMOS.  The clock runs at 8 MHz, which in effect runs the opcodes at 2 MHz (that is, two cycle instructions take one microsecond).

To control all these functions, the bytes in page zero from $DA through $FF are used as I/O, control, and status registers.

One of the trickiest enhancements allows direct access (without bank switching or bank registers) to a second 64K memory, for data only.  Apparently one of the address modes changes the state of one of the output signals during data memory references; if you use that signal to enable another bank of memory.  ALMOST like having direct-addressability of 128K.

The data bus is multiplexed with half of the address bus, so it's a little harder to interface.  Naturally, to get all the functions I mentioned above with only 64 pins, there have to be shared pins.  Depending on which functions you are using, some of the timers and some of the I/O pins have dedicated uses.

The 6502 has one unused status bit.  The 740 series calls this the T-flag, and gives it a use.  If T=1, a special address mode is enabled which allows memory-to-memory operations without using the A-register.  As I understand it, when T=1, address modes which use X as an index register take on a new meaning:  rather than moving data between the indexed address and the A-register, data is moved between the absolute address and the zero page location whose address is in the X-register.  If I am correct, ADC $400,X (assume X contains $34) would add the contents of $400 to the contents of $34, and store the result in $34.  If T=0, indexing works in the old-fashioned 6502 way.

Another powerful enhancement allows you call subroutines with a two-byte version of the JSR opcode.  One variation uses vectors stored in page zero, and the other uses vectors stored $FF00 through $FFF3.  JMP can also uses vectors stored in page zero, so you have a two-byte JMP indirect.

Four new opcodes give you the ability to set, clear, or test any bit in the A-register or in page zero.  This uses up 64 opcodes, because the bit number and bit state are coded into the opcode byte.  Rockwell's version of the 65C02 includes page-zero bit-addressing, but the opcodes are not the same.

There are other new instructions, including several about which I do not have accurate complete information.

       RRF zp     (I think it swaps nybbles in the byte)
       COM zp     (Probably forms 2's complement at zp)
       LDM zp     (Probably loads ABS(zp) into A-register)
       CLT        clear T-bit in status
       SET        set T-bit in status
       STP        stop the clock until reset or interrupt
       WIT        low power mode   "     "   "      "
       SLW        (slow?)
       FST        (fast?)
       INC        increment A-reg
       DEC        decrement A-reg
       BRA rel    branch always.

Of all the extensions, only ONE (BRA) is compatible with the standard 65C02 and 65816 extensions from Western Design Center (the OFFICIAL source for 6502 designs).  The others, even if they do the same thing, use a different opcode value.  Why?

If you have worked up an appetite for more information on the 740 series, contact Mitsubishi.  I don't have all their numbers, but you can get close by calling 1-800-421-1132.

When we get all the data, we will be writing a Cross Assembler so you can use your Apple to develop software for this chip.
